Inputs

Signal Name Function Block Macrocell Bank Pin Number Pin Type Pin Use I/O Std I/O Style
A8_15<3> FB1 MC1 2 13 I/O I LVTTL KPR
A8_15<2> FB1 MC3 2 12 I/O I LVTTL KPR
A8_15<1> FB1 MC4 2 11 I/O I LVTTL KPR
A8_15<0> FB1 MC5 2 10 I/O I LVTTL KPR
A8_15<4> FB2 MC2 1 14 I/O I LVTTL KPR
A8_15<5> FB2 MC3 1 15 I/O I LVTTL KPR
A8_15<6> FB2 MC4 1 16 I/O I LVTTL KPR
A8_15<7> FB2 MC5 1 17 I/O I LVTTL KPR
ALE FB2 MC13 1 22 I/O/GCK0 GCK LVTTL KPR
WE FB2 MC14 1 23 I/O/GCK1 GCK/I LVTTL KPR
RD FB2 MC16 1 27 I/O/GCK2 GCK/I LVTTL KPR
Rst FB3 MC4 2 99 I/O/GSR GSR/I LVTTL KPR
Dips2_0_7<0> FB5 MC2 2 66 I/O I LVTTL KPR
Dips2_0_7<1> FB5 MC3 2 67 I/O I LVTTL KPR
Dips2_0_7<2> FB5 MC5 2 68 I/O I LVTTL KPR
Dips2_0_7<3> FB5 MC7 2 70 I/O I LVTTL KPR
Dips2_0_7<4> FB5 MC11 2 71 I/O I LVTTL KPR
Dips2_0_7<5> FB5 MC12 2 72 I/O I LVTTL KPR
Dips2_0_7<6> FB5 MC13 2 73 I/O I LVTTL KPR
Dips2_0_7<7> FB5 MC14 2 74 I/O I LVTTL KPR
Dips1_0_7<7> FB6 MC1 1 64 I/O I LVTTL KPR
Dips1_0_7<6> FB6 MC2 1 63 I/O I LVTTL KPR
Dips1_0_7<5> FB6 MC3 1 61 I/O I LVTTL KPR
Dips1_0_7<4> FB6 MC4 1 60 I/O I LVTTL KPR
Dips1_0_7<3> FB6 MC5 1 59 I/O I LVTTL KPR
Dips1_0_7<2> FB6 MC6 1 58 I/O I LVTTL KPR
Dips1_0_7<1> FB6 MC12 1 56 I/O I LVTTL KPR
Dips1_0_7<0> FB6 MC14 1 55 I/O I LVTTL KPR